top of page

Current Projects

Screen Shot 2022-08-02 at 12.14.15 AM.png

In light of the attacks against real-world hardware platforms, the research on their vulnerabilities and corresponding countermeasures has gained further importance. As a prime example of such attacks, one targeting the users’ private keys used in hardware devices for authentication can be mentioned, where analyzing electromagnetic emanation, power consumption, and timing (often referred to as side-channel leakages) results in compromising the security of the device. Due to the effectiveness of such attacks leveraging side-channels, a great deal of attention has been paid to, particularly AI-assisted security verification. The involvement of standardization (e.g., National Institute of Standards and Technology) and certification bodies in the activities related to the development of tools for side-channel analysis further highlights the importance of this matter. In spite of the effort made in this respect, due to difficulties with regard to the constantly growing number of known side-channel attacks, evaluation of side-channel resiliency could be less practical. To tackle this and in line with the standardization activities, this project aims to address some of the fundamental shortcomings of the existing approaches relying on machine learning, specifically, deep learning, as a powerful tool to assess the security of devices against side-channel attacks. Hence, the results obtained through this project are expected to improve the security of millions of devices used across sensitive applications, including healthcare, intelligence, finance, transportation, and defense. Moreover, the research activities performed in this project are closely integrated with education and outreach efforts as both graduate, and undergraduate students will work on the project, thus gaining cutting-edge skills and expertise in hardware security. 

Screen Shot 2022-08-01 at 8.15_edited.jpg

This MRI acquisition project will allow the purchase of a high-resolution Photon Emission/Laser Fault Injection microscope and high-performance computers. This setup will provide a platform for research, teaching, and hands-on experience for students and industry professionals. The research this instrumentation will enable focuses on the performance and security analyses of electronic devices and systems at different stages of their lifetime which will address a critical issue, securing the integrated circuit (IC) supply chain. The project has the potential to secure large number of devices used across sensitive applications, such as in healthcare, artificial intelligence (AI), finance, transportation, and defense. With a user-friendly interface, the instrument is expected to maximize the accessibility for on-site and off-campus students and researchers. The data collected from this setup will be further made available as benchmarks to researchers in the field of AI and cybersecurity. The instrument will bring unique capabilities to the PIs’ institution and surrounding areas to conduct research, education, and outreach activities on IC security. The PIs plan to educate and train students through online and on-site courses, as well as seminars and workshops. The PIs plan to promote broadening the participation in this research area, especially recruitment of female students. 

SRC_IP.png

IP Protection through Cryptographically Secure Approaches

Outsourcing of integrated circuit (IC) design and fabrication has led to significant concerns about intellectual property (IP) piracy from both end-users and IP-owners. Logic locking has been proposed to guarantee that ICs only have the correct functionality if the IP-owner unlocks them, thus allowing the IP-owner to control the number of working ICs. However, the existing approaches are ad hoc, vulnerable to numerous structural, functional, and side channel attacks, and require expensive, on-chip structures for remote unlocking protocols. For soft IPs, the IEEE P1735 standard provides guidelines for encrypting RTL and managing IP rights. Aside from flaws found in this standard, it relies on trusted EDA tools and unrealistic safeguarding of their protected keys while also being susceptible to side channel attacks. In contrast to current state-of-the-art, this project aims to develop a framework that relies on recent advances in cryptography in order to address the above issues in a natural way.

bottom of page